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Proposal of the intrinsics for vector crypto #234
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ec97943
[Makefile] Add interface for providing more flags into the generator
eopXD 1a2014c
[vector-crypto] Define intrinsics for the Zvbb extension
eopXD 9785c5f
[Auto-gen] Update documents under ../auto-generated/vector-crypto. (m…
eopXD 97cfa64
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD 45f0ebc
[vector-crypto] Define intrinsics for the Zvbc extension
eopXD 06f2208
[Auto-gen] Update documents under ../auto-generated/vector-crypto. (m…
eopXD 6e27c75
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD 211b849
[vector-crypto] Define intrinsics for the Zvkg extension
eopXD 1a4be9a
[Auto-gen] Update documents under ../auto-generated/vector-crypto. (m…
eopXD 58a22a2
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD b0896b3
[vector-crypto] Define intrinsics for the Zvkned extension
eopXD 94e2085
[Auto-gen] Update documents under ../auto-generated/vector-crypto. (m…
eopXD 4d9e7cc
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD 0dcec1b
[vector-crypto] Define intrinsics for the Zvknh[ab] extension
eopXD 29386c9
[Auto-gen] Update documents under ../auto-generated/vector-crypto. (m…
eopXD 1b179fe
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD 295f8ac
[vector-crypto] Define intrinsics for the Zknsed extension
eopXD 82cc885
[Auto-gen] Update documents under ../auto-generated/vector-crypto. (m…
eopXD ba15f1b
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD da664fb
[vector-crypto] Define intrinsics for the Zvksh extension
eopXD 5f9eb8b
[Auto-gen] Update documents under ../auto-generated/vector-crypto. (m…
eopXD fe79ff3
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD 144b587
[Makefile] Add the vector crypto generation to golden check in CI
eopXD 852142f
[vector-crypto] Add more variants for 'vs' instructions
eopXD dd4f4ac
[Auto-gen] Update documents under ../auto-generated/vector-crypto. (m…
eopXD 122944b
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD efe7b4c
[vector-crypto] Document the availability for vector crypto intrinsic…
eopXD 65b2b98
[vector-crypto] Remove redundant variable in testing function declara…
eopXD 9790b4d
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD 3c1f66d
[vector-crypto] Bug fixes on intrinsic definitions
eopXD 38fbc31
[Auto-gen] Update documents under ../auto-generated/vector-crypto. (m…
eopXD 5d64bc5
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD f96638c
[vector-crypto] Append vs2 type in function name of vs variants of va…
eopXD 062975c
[Auto-gen] Update documents under ../auto-generated/vector-crypto. (m…
eopXD 8a5d49a
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD abea467
[vector-crypto] Add llvm test case header for vector crypto extensions
eopXD 2d0fd38
[Auto-gen] Update tests under ../auto-generated/vector-crypto. (make …
eopXD 856dda7
Update auto-generated/vector-crypto/intrinsic_funcs/00_zvbb_-_vector_…
kito-cheng b4019d3
Modify descriptions in vector_crypto_inst.py for correctness
4vtomat 45d63eb
Filter out LMUL=8 cases for .vs instructions
4vtomat dc973ee
Remove experimental for target-feature
4vtomat 0632c1f
Regenerate test cases and docs for vector crypto
4vtomat bb05072
Change the description of bit/byte reverse
4vtomat 3374d74
Add missing vcpop, vclz, vctz in api tests
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Original file line number | Diff line number | Diff line change |
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#include <stdint.h> | ||
#include <riscv_vector.h> | ||
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vuint32mf2_t test_vaesdf_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vv_u32mf2(vd, vs2, vl); | ||
} | ||
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vuint32mf2_t test_vaesdf_vs_u32mf2_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32mf2_u32mf2(vd, vs2, vl); | ||
} | ||
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||
vuint32m1_t test_vaesdf_vs_u32mf2_u32m1(vuint32m1_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32mf2_u32m1(vd, vs2, vl); | ||
} | ||
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||
vuint32m2_t test_vaesdf_vs_u32mf2_u32m2(vuint32m2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32mf2_u32m2(vd, vs2, vl); | ||
} | ||
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||
vuint32m4_t test_vaesdf_vs_u32mf2_u32m4(vuint32m4_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32mf2_u32m4(vd, vs2, vl); | ||
} | ||
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||
vuint32m8_t test_vaesdf_vs_u32mf2_u32m8(vuint32m8_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32mf2_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m1_t test_vaesdf_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vv_u32m1(vd, vs2, vl); | ||
} | ||
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vuint32m1_t test_vaesdf_vs_u32m1_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32m1_u32m1(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesdf_vs_u32m1_u32m2(vuint32m2_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32m1_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesdf_vs_u32m1_u32m4(vuint32m4_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32m1_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesdf_vs_u32m1_u32m8(vuint32m8_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32m1_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesdf_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vv_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesdf_vs_u32m2_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32m2_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesdf_vs_u32m2_u32m4(vuint32m4_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32m2_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesdf_vs_u32m2_u32m8(vuint32m8_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32m2_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesdf_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vv_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesdf_vs_u32m4_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32m4_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesdf_vs_u32m4_u32m8(vuint32m8_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vs_u32m4_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesdf_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t vl) { | ||
return __riscv_vaesdf_vv_u32m8(vd, vs2, vl); | ||
} |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,78 @@ | ||
#include <stdint.h> | ||
#include <riscv_vector.h> | ||
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vuint32mf2_t test_vaesdm_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vv_u32mf2(vd, vs2, vl); | ||
} | ||
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vuint32mf2_t test_vaesdm_vs_u32mf2_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32mf2_u32mf2(vd, vs2, vl); | ||
} | ||
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vuint32m1_t test_vaesdm_vs_u32mf2_u32m1(vuint32m1_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32mf2_u32m1(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesdm_vs_u32mf2_u32m2(vuint32m2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32mf2_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesdm_vs_u32mf2_u32m4(vuint32m4_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32mf2_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesdm_vs_u32mf2_u32m8(vuint32m8_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32mf2_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m1_t test_vaesdm_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vv_u32m1(vd, vs2, vl); | ||
} | ||
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vuint32m1_t test_vaesdm_vs_u32m1_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32m1_u32m1(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesdm_vs_u32m1_u32m2(vuint32m2_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32m1_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesdm_vs_u32m1_u32m4(vuint32m4_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32m1_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesdm_vs_u32m1_u32m8(vuint32m8_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32m1_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesdm_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vv_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesdm_vs_u32m2_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32m2_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesdm_vs_u32m2_u32m4(vuint32m4_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32m2_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesdm_vs_u32m2_u32m8(vuint32m8_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32m2_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesdm_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vv_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesdm_vs_u32m4_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32m4_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesdm_vs_u32m4_u32m8(vuint32m8_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vs_u32m4_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesdm_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t vl) { | ||
return __riscv_vaesdm_vv_u32m8(vd, vs2, vl); | ||
} |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,78 @@ | ||
#include <stdint.h> | ||
#include <riscv_vector.h> | ||
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vuint32mf2_t test_vaesef_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesef_vv_u32mf2(vd, vs2, vl); | ||
} | ||
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vuint32mf2_t test_vaesef_vs_u32mf2_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32mf2_u32mf2(vd, vs2, vl); | ||
} | ||
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vuint32m1_t test_vaesef_vs_u32mf2_u32m1(vuint32m1_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32mf2_u32m1(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesef_vs_u32mf2_u32m2(vuint32m2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32mf2_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesef_vs_u32mf2_u32m4(vuint32m4_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32mf2_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesef_vs_u32mf2_u32m8(vuint32m8_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32mf2_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m1_t test_vaesef_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesef_vv_u32m1(vd, vs2, vl); | ||
} | ||
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vuint32m1_t test_vaesef_vs_u32m1_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32m1_u32m1(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesef_vs_u32m1_u32m2(vuint32m2_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32m1_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesef_vs_u32m1_u32m4(vuint32m4_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32m1_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesef_vs_u32m1_u32m8(vuint32m8_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32m1_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesef_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesef_vv_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesef_vs_u32m2_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32m2_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesef_vs_u32m2_u32m4(vuint32m4_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32m2_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesef_vs_u32m2_u32m8(vuint32m8_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32m2_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesef_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesef_vv_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesef_vs_u32m4_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32m4_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesef_vs_u32m4_u32m8(vuint32m8_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesef_vs_u32m4_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesef_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t vl) { | ||
return __riscv_vaesef_vv_u32m8(vd, vs2, vl); | ||
} |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,78 @@ | ||
#include <stdint.h> | ||
#include <riscv_vector.h> | ||
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vuint32mf2_t test_vaesem_vv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesem_vv_u32mf2(vd, vs2, vl); | ||
} | ||
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vuint32mf2_t test_vaesem_vs_u32mf2_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32mf2_u32mf2(vd, vs2, vl); | ||
} | ||
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vuint32m1_t test_vaesem_vs_u32mf2_u32m1(vuint32m1_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32mf2_u32m1(vd, vs2, vl); | ||
} | ||
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vuint32m2_t test_vaesem_vs_u32mf2_u32m2(vuint32m2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32mf2_u32m2(vd, vs2, vl); | ||
} | ||
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vuint32m4_t test_vaesem_vs_u32mf2_u32m4(vuint32m4_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32mf2_u32m4(vd, vs2, vl); | ||
} | ||
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vuint32m8_t test_vaesem_vs_u32mf2_u32m8(vuint32m8_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32mf2_u32m8(vd, vs2, vl); | ||
} | ||
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vuint32m1_t test_vaesem_vv_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesem_vv_u32m1(vd, vs2, vl); | ||
} | ||
|
||
vuint32m1_t test_vaesem_vs_u32m1_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32m1_u32m1(vd, vs2, vl); | ||
} | ||
|
||
vuint32m2_t test_vaesem_vs_u32m1_u32m2(vuint32m2_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32m1_u32m2(vd, vs2, vl); | ||
} | ||
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||
vuint32m4_t test_vaesem_vs_u32m1_u32m4(vuint32m4_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32m1_u32m4(vd, vs2, vl); | ||
} | ||
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||
vuint32m8_t test_vaesem_vs_u32m1_u32m8(vuint32m8_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32m1_u32m8(vd, vs2, vl); | ||
} | ||
|
||
vuint32m2_t test_vaesem_vv_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesem_vv_u32m2(vd, vs2, vl); | ||
} | ||
|
||
vuint32m2_t test_vaesem_vs_u32m2_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32m2_u32m2(vd, vs2, vl); | ||
} | ||
|
||
vuint32m4_t test_vaesem_vs_u32m2_u32m4(vuint32m4_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32m2_u32m4(vd, vs2, vl); | ||
} | ||
|
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vuint32m8_t test_vaesem_vs_u32m2_u32m8(vuint32m8_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32m2_u32m8(vd, vs2, vl); | ||
} | ||
|
||
vuint32m4_t test_vaesem_vv_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesem_vv_u32m4(vd, vs2, vl); | ||
} | ||
|
||
vuint32m4_t test_vaesem_vs_u32m4_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32m4_u32m4(vd, vs2, vl); | ||
} | ||
|
||
vuint32m8_t test_vaesem_vs_u32m4_u32m8(vuint32m8_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaesem_vs_u32m4_u32m8(vd, vs2, vl); | ||
} | ||
|
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vuint32m8_t test_vaesem_vv_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t vl) { | ||
return __riscv_vaesem_vv_u32m8(vd, vs2, vl); | ||
} |
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Original file line number | Diff line number | Diff line change |
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#include <stdint.h> | ||
#include <riscv_vector.h> | ||
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vuint32mf2_t test_vaeskf1_vi_u32mf2(vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaeskf1_vi_u32mf2(vs2, 0, vl); | ||
} | ||
|
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vuint32m1_t test_vaeskf1_vi_u32m1(vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaeskf1_vi_u32m1(vs2, 0, vl); | ||
} | ||
|
||
vuint32m2_t test_vaeskf1_vi_u32m2(vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaeskf1_vi_u32m2(vs2, 0, vl); | ||
} | ||
|
||
vuint32m4_t test_vaeskf1_vi_u32m4(vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaeskf1_vi_u32m4(vs2, 0, vl); | ||
} | ||
|
||
vuint32m8_t test_vaeskf1_vi_u32m8(vuint32m8_t vs2, size_t vl) { | ||
return __riscv_vaeskf1_vi_u32m8(vs2, 0, vl); | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,22 @@ | ||
#include <stdint.h> | ||
#include <riscv_vector.h> | ||
|
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vuint32mf2_t test_vaeskf2_vi_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, size_t vl) { | ||
return __riscv_vaeskf2_vi_u32mf2(vd, vs2, 0, vl); | ||
} | ||
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vuint32m1_t test_vaeskf2_vi_u32m1(vuint32m1_t vd, vuint32m1_t vs2, size_t vl) { | ||
return __riscv_vaeskf2_vi_u32m1(vd, vs2, 0, vl); | ||
} | ||
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||
vuint32m2_t test_vaeskf2_vi_u32m2(vuint32m2_t vd, vuint32m2_t vs2, size_t vl) { | ||
return __riscv_vaeskf2_vi_u32m2(vd, vs2, 0, vl); | ||
} | ||
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vuint32m4_t test_vaeskf2_vi_u32m4(vuint32m4_t vd, vuint32m4_t vs2, size_t vl) { | ||
return __riscv_vaeskf2_vi_u32m4(vd, vs2, 0, vl); | ||
} | ||
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vuint32m8_t test_vaeskf2_vi_u32m8(vuint32m8_t vd, vuint32m8_t vs2, size_t vl) { | ||
return __riscv_vaeskf2_vi_u32m8(vd, vs2, 0, vl); | ||
} |
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This should use a constant that is meaningful in the spec. 1-10 are the true valid valid values for this instruction.