hypv-virt-load.adoc

HLV.B

See HLV.W.

HLV.BU

See HLV.W.

HLV.H

See HLV.W.

HLV.HU

See HLV.W.

HLV.WU

See HLV.W.

HLV.D

See HLV.W.

HLV.W

Synopsis

Hypervisor virtual-machine load

{cheri_cap_mode_name} Mnemonics (RV64)

hlv.b[u] rd, cs1
hlv.h[u] rd, cs1
hlv.w[u] rd, cs1
hlv.d rd, cs1

{cheri_int_mode_name} Mnemonics (RV64)

hlv.b[u] rd, rs1
hlv.h[u] rd, rs1
hlv.w[u] rd, rs1
hlv.d rd, rs1

{cheri_cap_mode_name} Mnemonics (RV32)

hlv.b[u] rd, cs1
hlv.h[u] rd, cs1
hlv.w rd, cs1

{cheri_int_mode_name} Mnemonics (RV32)

hlv.b[u] rd, rs1
hlv.h[u] rd, rs1
hlv.w rd, rs1

Encoding

wavedrom/hypv-virt-load.adoc

{cheri_cap_mode_name} Description

Performs a load as though V=1; i.e., with the address translation and protection, and endianness, that apply to memory accesses in either VS-mode or VU-mode. The effective address is the address of cs1. The authorizing capability for the operation is cs1. A copy of the loaded value is written to rd.

load_store_c0.adoc

{cheri_int_mode_name} Description

Performs a load as though V=1; i.e., with the address translation and protection, and endianness, that apply to memory accesses in either VS-mode or VU-mode. The effective address is the is rs1. The authorizing capability for the operation is [ddc]. A copy of the loaded value is written to rd.

load_exceptions.adoc

Prerequisites for {cheri_cap_mode_name} HLV.B[U], HLV.H[U], HLV.W

{cheri_base_ext_name}, H

Prerequisites for {cheri_int_mode_name} HLV.B[U], HLV.H[U], HLV.W

{cheri_base_ext_name}, {cheri_default_ext_name}, H

Prerequisites for {cheri_cap_mode_name} HLV.WU, HLV.D

RV64, {cheri_base_ext_name}, H

Prerequisites for {cheri_int_mode_name} HLV.WU, HLV.D

RV64, {cheri_base_ext_name}, {cheri_default_ext_name}, H

{cheri_cap_mode_name} Operation

TBD

{cheri_int_mode_name} Operation

TBD