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clarify writes to dinfc #417

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merged 4 commits into from
Oct 14, 2024
Merged

clarify writes to dinfc #417

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4e0b0da
clarify writes to dinfc
tariqkurd-repo Oct 10, 2024
9e6aca5
failed to sync csv
tariqkurd-repo Oct 10, 2024
43855ab
updated after internal review
tariqkurd-repo Oct 11, 2024
52b2e68
Update src/riscv-hybrid-integration.adoc
tariqkurd-repo Oct 14, 2024
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2 changes: 1 addition & 1 deletion src/csv/CHERI_CSR.csv
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Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ direct write if address didn't change","","✔","","","{cheri_default_ext_name},
"ddc","0x416","","U","URW","<<infinite-cap>>","Apply <<section_invalid_addr_conv>>.
Always update the CSR with <<SCADDR>> even if the address didn't change.","Apply <<section_invalid_addr_conv>> and update the CSR with the result if the address changed,
direct write if address didn't change","","✔","","","{cheri_default_ext_name}","User Default Data Capability","","","","","","","","","","","","","","","","","","","","",""
"dinfc","0x7bd","","D","DRW","<<infinite-cap>>","Ignore","Ignore","","","","✔","Sdext","Source of <<infinite-cap>> capability in debug mode, writes are ignored","","","","","","","","","","","","","","","","","","","","",""
"dinfc","0x7bd","","D","DRW","<<infinite-cap>>","Ignore","Update <<m_bit>> only if valid in written capability.","","","","✔","Sdext","Source of <<infinite-cap>> capability in debug mode, writes are ignored","","","","","","","","","","","","","","","","","","","","",""
"utidc","0x480","utid","U","Read: U, Write: U, <<asr_perm>>","tag=0, otherwise undefined","Update the CSR using <<SCADDR>>.","direct write","","","","✔","Zstid","User thread ID","","","","","","","","","","","","","","","","","","","","",""
"stidc","0x580","stid","S","Read: S, Write: S, <<asr_perm>>","tag=0, otherwise undefined","Update the CSR using <<SCADDR>>.","direct write","","","","✔","Zstid","Supervisor thread ID","","","","","","","","","","","","","","","","","","","","",""
"vstidc","0xA80","vstid","H","Read: VS, Write: VS, <<asr_perm>>","tag=0, otherwise undefined","Update the CSR using <<SCADDR>>.","direct write","","","","✔","Zstid","Virtual supervisor thread ID","","","","","","","","","","","","","","","","","","","","",""
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8 changes: 6 additions & 2 deletions src/debug-integration.adoc
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Expand Up @@ -185,8 +185,12 @@ If {cheri_default_ext_name} is implemented:
** This only needs doing once after resetting the core.
* The <<m_bit>> is used on debug mode entry to determine which CHERI execution mode to enter.

The <<m_bit>> is the only writeable field in <<dinfc>>.
Therefore if {cheri_default_ext_name} is not implemented then it is read-write with no writeable fields.
The <<m_bit>> is the only writeable field in <<dinfc>>:

* It is only updated on a <<CSRRW>> write _if_ the capability being written has a valid <<m_bit>>.
* If any other CSR instruction is used, or if the written <<m_bit>> is not valid then <<dinfc>> is not updated.

If {cheri_default_ext_name} is not implemented then <<dinfc>> is read-write with no writeable fields.

NOTE: A future version of this specification may add writeable fields to allow creation
of other capabilities, if, for example, a future extension requires multiple formats for
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