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fix section header out of sequence warnings:
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```
asciidoctor: WARNING: riscv-zabha.adoc: line 53: section title out of sequence: expected levels 0 or 1, got level 2
asciidoctor: WARNING: riscv-zabha.adoc: line 63: section title out of sequence: expected levels 0 or 1, got level 2
```

Signed-off-by: Kevin Broch <kbroch@rivosinc.com>
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kbroch-rivosinc committed Mar 22, 2024
1 parent ea4f0a1 commit 9dcc185
Showing 1 changed file with 3 additions and 4 deletions.
7 changes: 3 additions & 4 deletions src/riscv-zabha.adoc
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
[[header]]
= Byte and Halfword Atomic Memory Operations (Zabha)
:description: Byte and Halfword Atomic Memory Operations (Zabha)
:company: RISC-V.org
:revdate: 1/2024
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:footnote:
:xrefstyle: short

= Byte and Halfword Atomic Memory Operations (Zabha)

// Preamble
[WARNING]
Expand All @@ -50,7 +49,7 @@ likely not conform to the future standard.
====

[preface]
=== Copyright and license information
== Copyright and license information

This specification is licensed under the Creative Commons
Attribution 4.0 International License (CC-BY 4.0). The full
Expand All @@ -60,7 +59,7 @@ https://creativecommons.org/licenses/by/4.0/.
Copyright 2024 by RISC-V International.

[preface]
=== Contributors
== Contributors

This RISC-V specification has been contributed to directly or indirectly by:
Ved Shanbhogue, Andrew Waterman, Gianluca Guida, Hans Boehm
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