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RISCV: Add vector psabi checking. #376
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2c68135
RISCV: Add vector psabi checking.
211f26b
fix: disable the warning on attribute vector_size.
1004381
fix: code style.
f9bafb8
fix: need to split the words with space.
cb6ae98
fix: pass the right field type and other comments.
33484c5
fix: address comments.
a6c96b8
fix: disable intrinsic warning.
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Original file line number | Diff line number | Diff line change |
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@@ -3728,6 +3728,76 @@ riscv_pass_fpr_pair (machine_mode mode, unsigned regno1, | |
GEN_INT (offset2)))); | ||
} | ||
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/* Use the TYPE_SIZE to distinguish the type with vector_size attribute and | ||
intrinsic vector type. Because we can't get the decl for the params. */ | ||
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static bool | ||
riscv_scalable_vector_type_p (const_tree type) | ||
{ | ||
tree size = TYPE_SIZE (type); | ||
if (size && TREE_CODE (size) == INTEGER_CST) | ||
return true; | ||
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/* For the data type like vint32m1_t, the size code is POLY_INT_CST. */ | ||
return false; | ||
} | ||
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static bool | ||
riscv_arg_has_vector (const_tree type) | ||
{ | ||
bool is_vector = false; | ||
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switch (TREE_CODE (type)) | ||
{ | ||
case RECORD_TYPE: | ||
if (!COMPLETE_TYPE_P (type)) | ||
break; | ||
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for (tree f = TYPE_FIELDS (type); f; f = DECL_CHAIN (f)) | ||
if (TREE_CODE (f) == FIELD_DECL) | ||
{ | ||
tree field_type = TREE_TYPE (f); | ||
if (!TYPE_P (field_type)) | ||
break; | ||
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/* Ignore it if it's fixed length vector. */ | ||
if (VECTOR_TYPE_P (field_type)) | ||
is_vector = !riscv_scalable_vector_type_p (field_type); | ||
else | ||
is_vector = riscv_arg_has_vector (field_type); | ||
} | ||
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break; | ||
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case VECTOR_TYPE: | ||
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is_vector = !riscv_scalable_vector_type_p (type); | ||
break; | ||
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default: | ||
is_vector = false; | ||
break; | ||
} | ||
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return is_vector; | ||
} | ||
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/* Pass the type to check whether it's a vector type or contains vector type. | ||
Only check the value type and no checking for vector pointer type. */ | ||
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static void | ||
riscv_pass_in_vector_p (const_tree type) | ||
{ | ||
static int warned = 0; | ||
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if (type && riscv_arg_has_vector (type) && !warned) | ||
{ | ||
warning (OPT_Wpsabi, "ABI for the vector type is currently in " | ||
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"experimental stage and may changes in the upcoming version of " | ||
"GCC."); | ||
warned = 1; | ||
} | ||
} | ||
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/* Fill INFO with information about a single argument, and return an | ||
RTL pattern to pass or return the argument. CUM is the cumulative | ||
state for earlier arguments. MODE is the mode of this argument and | ||
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@@ -3812,6 +3882,9 @@ riscv_get_arg_info (struct riscv_arg_info *info, const CUMULATIVE_ARGS *cum, | |
} | ||
} | ||
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/* Only check existing of vector type. */ | ||
riscv_pass_in_vector_p (type); | ||
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/* Work out the size of the argument. */ | ||
num_bytes = type ? int_size_in_bytes (type) : GET_MODE_SIZE (mode).to_constant (); | ||
num_words = (num_bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; | ||
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,14 @@ | ||
/* { dg-do compile } */ | ||
/* { dg-options "-O0 -march=rv64gcv -mabi=lp64d" } */ | ||
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#include "riscv_vector.h" | ||
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void | ||
fun (vint32m1_t a) { } /* { dg-warning "the vector type" } */ | ||
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void | ||
bar () | ||
{ | ||
vint32m1_t a; | ||
fun (a); | ||
} |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,14 @@ | ||
/* { dg-do compile } */ | ||
/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ | ||
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#include "riscv_vector.h" | ||
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vint32m1_t | ||
fun (vint32m1_t* a) { return *a; } /* { dg-warning "the vector type" } */ | ||
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void | ||
bar () | ||
{ | ||
vint32m1_t a; | ||
fun (&a); | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,14 @@ | ||
/* { dg-do compile } */ | ||
/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ | ||
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#include "riscv_vector.h" | ||
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vint32m1_t* | ||
fun (vint32m1_t* a) { return a; } /* { dg-bogus "the vector type" } */ | ||
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void | ||
bar () | ||
{ | ||
vint32m1_t a; | ||
fun (&a); | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,16 @@ | ||
/* { dg-do compile } */ | ||
/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ | ||
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#include "riscv_vector.h" | ||
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typedef int v4si __attribute__ ((vector_size (16))); | ||
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v4si | ||
fun (v4si a) { return a; } /* { dg-bogus "the vector type" } */ | ||
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void | ||
bar () | ||
{ | ||
v4si a; | ||
fun (a); | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,15 @@ | ||
/* { dg-do compile } */ | ||
/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ | ||
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typedef int v4si __attribute__ ((vector_size (16))); | ||
struct A { int a; v4si b; }; | ||
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void | ||
fun (struct A a) {} /* { dg-bogus "the vector type" } */ | ||
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void | ||
bar () | ||
{ | ||
struct A a; | ||
fun (a); | ||
} |
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The return value should be inverted after function rename :)
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Oh understand. Could I know why the intrinsic vector type is named as
scalable vector
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that's the term defined in AArch64 SVE actually, and we follow to use that term in our backend too , e.g. riscv.cc:riscv_v_adjust_scalable_frame