wasm32: Fix undefined behavior with shift intrinsics #1737
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This commit fixes an issue where simd shift intrinsic in LLVM are undefined behavior if the shift amount is larger than the bit width of the lane. While in WebAssembly the corresponding instructions are defined as masking out the upper bits we need to represent that explicitly in LLVM IR to ensure that the semantics remain defined. cc rust-lang/rust#137941
RalfJung
reviewed
Mar 3, 2025
| @@ -2318,7 +2318,7 @@ pub fn u8x16_narrow_i16x8(a: v128, b: v128) -> v128 { | |||
| #[doc(alias("i8x16.shl"))] | |||
| #[stable(feature = "wasm_simd", since = "1.54.0")] | |||
| pub fn i8x16_shl(a: v128, amt: u32) -> v128 { | |||
| unsafe { simd_shl(a.as_i8x16(), simd::i8x16::splat(amt as i8)).v128() } | |||
| unsafe { simd_shl(a.as_i8x16(), simd::i8x16::splat((amt & 0x7) as i8)).v128() } | |||
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Seems like a good time to add some SAFETY comments to these unsafe blocks?
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This commit fixes an issue where simd shift intrinsic in LLVM are undefined behavior if the shift amount is larger than the bit width of the lane. While in WebAssembly the corresponding instructions are defined as masking out the upper bits we need to represent that explicitly in LLVM IR to ensure that the semantics remain defined.
cc rust-lang/rust#137941