Skip to content
This repository has been archived by the owner on Jan 10, 2025. It is now read-only.

Docs - fix bytecode spec #589

Merged
merged 2 commits into from
Sep 6, 2024
+4 −2
Merged

Docs - fix bytecode spec #589

Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
cf8066c
SUB32_REG will also cease to perform sign extension of results.
Lichtso Sep 6, 2024
3036099
Fixes verification rules around call instructions.
Lichtso Sep 6, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 4 additions & 2 deletions doc/bytecode.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -87,7 +87,8 @@ The following Rust equivalents assume that:
| `0C` / `00001100` | from v2 | `add32 dst, src` | `dst = (dst as u32).wrapping_add(src as u32) as u64`
| `14` / `00010100` | until v2 | `sub32 dst, imm` | `dst = (dst as u32).wrapping_sub(imm) as u64`
| `14` / `00010100` | from v2 | `sub32 dst, imm` | `dst = imm.wrapping_sub(dst as u32) as u64`
| `1C` / `00011100` | all | `sub32 dst, src` | `dst = (dst as u32).wrapping_sub(src as u32) as u64`
| `1C` / `00011100` | until v2 | `sub32 dst, src` | `dst = (dst as u32).wrapping_sub(src as u32) as i32 as i64 as u64`
| `1C` / `00011100` | from v2 | `sub32 dst, src` | `dst = (dst as u32).wrapping_sub(src as u32) as u64`
| `24` / `00100100` | until v2 | `mul32 dst, imm` | `dst = (dst as i32).wrapping_mul(imm as i32) as i64 as u64`
| `2C` / `00101100` | until v2 | `mul32 dst, src` | `dst = (dst as i32).wrapping_mul(src as i32) as i64 as u64`
| `34` / `00110100` | until v2 | `div32 dst, imm` | `dst = ((dst as u32) / imm) as u64`
Expand Down Expand Up @@ -322,5 +323,6 @@ Verification
- `hor64` is allowed
- The offset of jump instructions must be limited to the range of the current function
- `callx` source register is encoded in the src field
- The targets of syscalls (`call` instructions with src ≠ 0) must have been registered at verification time
- The targets of internal calls (`call` instructions with src ≠ 0) must have been registered at verification time
- The targets of syscalls (`call` instructions with src = 0) must have been registered at verification time
Copy link

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I know what you meant here, but I think writing prior to verification time would be a clearer wording.

- `add64 reg, imm` can use `r11` as destination register