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[WIP] Refactor for embedded-hal v1.0.0-alpha.6
Signed-off-by: Moritz Scheuren <moritz.scheuren@systec-electronic.com>
1 parent e84d5a3 commit 69cd1b8

21 files changed

+219
-196
lines changed

Cargo.toml

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -15,30 +15,28 @@ version = "0.6.0"
1515
features = ["stm32f746", "rt"]
1616

1717
[dependencies]
18-
as-slice = "0.1.0"
18+
as-slice = "0.2.1"
1919
cortex-m = "0.7"
2020
cortex-m-rt = ">=0.6.15, <0.8"
2121
embedded-time = "0.12.0"
22-
nb = "0.1.2"
22+
nb = "1.0.0"
2323
rtcc = "0.2"
2424
stm32f7 = "0.14.0"
25-
micromath = "1.0.0"
25+
micromath = "2.0.0"
2626
synopsys-usb-otg = { version = "0.2.3", features = ["cortex-m"], optional = true }
2727
stm32-fmc = { version = "0.2.0", features = ["sdram"], optional = true }
2828
rand_core = "0.6"
29-
bxcan = ">=0.4, <0.6"
29+
bxcan = "0.6.2"
3030

3131
[dependencies.bare-metal]
32-
version = "0.2.4"
33-
features = ["const-fn"]
32+
version = "1.0.0"
3433

3534
[dependencies.cast]
3635
default-features = false
37-
version = "0.2.2"
36+
version = "0.3.0"
3837

3938
[dependencies.embedded-hal]
40-
features = ["unproven"]
41-
version = "0.2.3"
39+
version = "1.0.0-alpha.6"
4240

4341
[dependencies.void]
4442
default-features = false
@@ -52,7 +50,7 @@ version = "0.4.1"
5250
cortex-m-semihosting = "0.3.3"
5351
panic-halt = "0.2.0"
5452
panic-semihosting = "0.5.2"
55-
embedded-graphics = "0.6.1"
53+
embedded-graphics = "0.6.2"
5654
usb-device = "0.2.5"
5755
usbd-serial = "0.1.0"
5856

examples/blinky_delay.rs

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
extern crate panic_halt;
99

1010
use cortex_m_rt::entry;
11+
use embedded_hal::delay::blocking::DelayUs;
1112
use stm32f7xx_hal::{delay::Delay, pac, prelude::*};
1213

1314
#[entry]
@@ -29,9 +30,9 @@ fn main() -> ! {
2930

3031
loop {
3132
led.set_high();
32-
delay.delay_ms(500_u16);
33+
delay.delay_ms(500).unwrap();
3334

3435
led.set_low();
35-
delay.delay_ms(500_u16);
36+
delay.delay_ms(500).unwrap();
3637
}
3738
}

examples/can-echo.rs

Lines changed: 9 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -40,13 +40,13 @@ fn main() -> ! {
4040
let tx = gpioa.pa12.into_alternate();
4141

4242
let can = Can::new(dp.CAN1, &mut rcc.apb1, (tx, rx));
43-
bxcan::Can::new(can)
43+
44+
bxcan::Can::builder(can)
45+
// APB1 (PCLK1): 130MHz, Bit rate: 512kBit/s, Sample Point 87.5%
46+
// Value was calculated with http://www.bittiming.can-wiki.info/
47+
.set_bit_timing(0x001e_000b)
48+
.enable()
4449
};
45-
can1.configure(|config| {
46-
// APB1 (PCLK1): 130MHz, Bit rate: 512kBit/s, Sample Point 87.5%
47-
// Value was calculated with http://www.bittiming.can-wiki.info/
48-
config.set_bit_timing(0x001e_000b);
49-
});
5050

5151
// Configure filters so that can frames can be received.
5252
let mut filters = can1.modify_filters();
@@ -58,12 +58,11 @@ fn main() -> ! {
5858

5959
let can = Can::new(dp.CAN2, &mut rcc.apb1, (tx, rx));
6060

61-
let mut can2 = bxcan::Can::new(can);
62-
can2.configure(|config| {
61+
let can2 = bxcan::Can::builder(can)
6362
// APB1 (PCLK1): 130MHz, Bit rate: 512kBit/s, Sample Point 87.5%
6463
// Value was calculated with http://www.bittiming.can-wiki.info/
65-
config.set_bit_timing(0x001e_000b);
66-
});
64+
.set_bit_timing(0x001e_000b)
65+
.enable();
6766

6867
// A total of 28 filters are shared between the two CAN instances.
6968
// Split them equally between CAN1 and CAN2.
@@ -80,9 +79,6 @@ fn main() -> ! {
8079
let mut can = can1;
8180
//let mut can = can2;
8281

83-
// Split the peripheral into transmitter and receiver parts.
84-
block!(can.enable()).unwrap();
85-
8682
// Echo back received packages in sequence.
8783
// See the `can-rtfm` example for an echo implementation that adheres to
8884
// correct frame ordering based on the transfer id.

examples/can-loopback.rs

Lines changed: 6 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -41,16 +41,14 @@ fn main() -> ! {
4141

4242
let can = Can::new(dp.CAN1, &mut rcc.apb1, (tx, rx));
4343

44-
let mut can = bxcan::Can::new(can);
45-
4644
// Use loopback mode: No pins need to be assigned to peripheral.
47-
can.configure(|config| {
45+
let mut can = bxcan::Can::builder(can)
4846
// APB1 (PCLK1): 130MHz, Bit rate: 512kBit/s, Sample Point 87.5%
4947
// Value was calculated with http://www.bittiming.can-wiki.info/
50-
config.set_bit_timing(0x001e_000b);
51-
config.set_loopback(true);
52-
config.set_silent(true);
53-
});
48+
.set_bit_timing(0x001e_000b)
49+
.set_loopback(true)
50+
.set_silent(true)
51+
.enable();
5452

5553
let mut filters = can.modify_filters();
5654
assert!(filters.num_banks() > 3);
@@ -90,12 +88,9 @@ fn main() -> ! {
9088
],
9189
);
9290

93-
// Enable filters.
91+
// Drop filters to leave filter configuraiton mode.
9492
drop(filters);
9593

96-
// Sync to the bus and start normal operation.
97-
block!(can.enable()).ok();
98-
9994
// Some messages shall pass the filters.
10095
for &id in &[0, 1, 2, 8, 9, 10, 11] {
10196
let frame_tx = Frame::new_data(StandardId::new(id).unwrap(), [id as u8]);

examples/i2c_scanner.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@ use panic_semihosting as _;
1111
use cortex_m_rt::entry;
1212
use cortex_m_semihosting::{hprint, hprintln};
1313

14+
use embedded_hal::i2c::blocking::Write;
1415
use stm32f7xx_hal::{self as hal, gpio::GpioExt, pac, prelude::*};
1516

1617
const VALID_ADDR_RANGE: Range<u8> = 0x08..0x78;

examples/serial_delay.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@ extern crate panic_halt;
1212
use core::fmt::Write;
1313

1414
use cortex_m_rt::entry;
15+
use embedded_hal::delay::blocking::DelayUs;
1516
use stm32f7xx_hal::{
1617
delay::Delay,
1718
pac,
@@ -50,6 +51,6 @@ fn main() -> ! {
5051
let hello: &str = "Hello, I'm a STM32F7xx!\r\n";
5152
loop {
5253
tx.write_str(hello).unwrap();
53-
delay.delay_ms(500_u16);
54+
delay.delay_ms(500).unwrap();
5455
}
5556
}

examples/serial_echo.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@ extern crate panic_halt;
1212
use nb::block;
1313

1414
use cortex_m_rt::entry;
15+
use embedded_hal::serial::nb::{Read, Write};
1516
use stm32f7xx_hal::{
1617
pac,
1718
prelude::*,

examples/spi.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
extern crate panic_semihosting;
55

66
use cortex_m_rt::entry;
7+
use embedded_hal::spi::blocking::TransferInplace;
78
use stm32f7xx_hal::{
89
pac,
910
prelude::*,
@@ -48,7 +49,7 @@ fn main() -> ! {
4849
let mut buffer = [0; 2];
4950
buffer[0] = 0x75 | 0x80;
5051
ncs.set_low();
51-
spi.transfer(&mut buffer).unwrap();
52+
spi.transfer_inplace(&mut buffer).unwrap();
5253
ncs.set_high();
5354

5455
// The WHO_AM_I register should always return 0x71.

examples/spi_16.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
extern crate panic_semihosting;
55

66
use cortex_m_rt::entry;
7+
use embedded_hal::spi::blocking::Write;
78
use stm32f7xx_hal::{
89
pac,
910
prelude::*,

examples/timer.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ fn main() -> ! {
3232
unsafe {
3333
NVIC::unmask(pac::Interrupt::TIM2);
3434
}
35-
let mut timer = Timer::tim2(dp.TIM2, 1.Hz(), clocks, &mut rcc.apb1);
35+
let mut timer = Timer::tim2(dp.TIM2, 1.Hz(), clocks, &mut rcc.apb1).unwrap();
3636
timer.listen(Event::TimeOut);
3737

3838
loop {}

src/adc.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ use crate::pac::{ADC1, ADC2, ADC3, ADC_COMMON};
1111

1212
use cortex_m::asm::delay;
1313

14-
use embedded_hal::adc::{Channel, OneShot};
14+
use embedded_hal::adc::nb::{Channel, OneShot};
1515

1616
#[derive(Clone, Copy, Debug, PartialEq)]
1717
#[allow(non_camel_case_types)]
@@ -95,7 +95,7 @@ macro_rules! adc_pins {
9595
impl Channel<$ADC> for $pin {
9696
type ID = u8;
9797

98-
fn channel() -> u8 { $chan }
98+
fn channel(&self) -> u8 { $chan }
9999
}
100100
)+
101101
};
@@ -442,8 +442,8 @@ macro_rules! adc_hal {
442442
{
443443
type Error = ();
444444

445-
fn read(&mut self, _pin: &mut PIN) -> nb::Result<WORD, Self::Error> {
446-
let res = self.convert(PIN::channel());
445+
fn read(&mut self, pin: &mut PIN) -> nb::Result<WORD, Self::Error> {
446+
let res = self.convert(PIN::channel(pin));
447447
Ok(res.into())
448448
}
449449
}

src/delay.rs

Lines changed: 5 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,9 @@
11
//! Delays
22
3-
use cast::u32;
43
use cortex_m::peripheral::syst::SystClkSource;
54
use cortex_m::peripheral::SYST;
65

7-
use crate::hal::blocking::delay::{DelayMs, DelayUs};
6+
use crate::hal::delay::blocking::DelayUs;
87
use crate::rcc::Clocks;
98

109
/// System timer (SysTick) as a delay provider
@@ -27,26 +26,10 @@ impl Delay {
2726
}
2827
}
2928

30-
impl DelayMs<u32> for Delay {
31-
fn delay_ms(&mut self, ms: u32) {
32-
self.delay_us(ms * 1_000);
33-
}
34-
}
35-
36-
impl DelayMs<u16> for Delay {
37-
fn delay_ms(&mut self, ms: u16) {
38-
self.delay_ms(u32(ms));
39-
}
40-
}
41-
42-
impl DelayMs<u8> for Delay {
43-
fn delay_ms(&mut self, ms: u8) {
44-
self.delay_ms(u32(ms));
45-
}
46-
}
29+
impl DelayUs for Delay {
30+
type Error = ();
4731

48-
impl DelayUs<u32> for Delay {
49-
fn delay_us(&mut self, us: u32) {
32+
fn delay_us(&mut self, us: u32) -> Result<(), Self::Error> {
5033
// The SysTick Reload Value register supports values between 1 and 0x00FFFFFF.
5134
const MAX_RVR: u32 = 0x00FF_FFFF;
5235

@@ -70,17 +53,6 @@ impl DelayUs<u32> for Delay {
7053

7154
self.syst.disable_counter();
7255
}
73-
}
74-
}
75-
76-
impl DelayUs<u16> for Delay {
77-
fn delay_us(&mut self, us: u16) {
78-
self.delay_us(u32(us))
79-
}
80-
}
81-
82-
impl DelayUs<u8> for Delay {
83-
fn delay_us(&mut self, us: u8) {
84-
self.delay_us(u32(us))
56+
Ok(())
8557
}
8658
}

src/gpio.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -47,10 +47,10 @@
4747
use core::convert::Infallible;
4848
use core::marker::PhantomData;
4949

50-
pub use embedded_hal::digital::v2::PinState;
51-
use embedded_hal::digital::v2::{
50+
use embedded_hal::digital::blocking::{
5251
InputPin, IoPin, OutputPin, StatefulOutputPin, ToggleableOutputPin,
5352
};
53+
pub use embedded_hal::digital::PinState;
5454

5555
use crate::pac::{EXTI, SYSCFG};
5656
use crate::rcc::{Enable, APB2};
@@ -450,7 +450,7 @@ impl<MODE, const P: char, const N: u8> Pin<Output<MODE>, P, N> {
450450

451451
#[inline(always)]
452452
pub fn toggle(&mut self) {
453-
if self.is_set_low() {
453+
if self.is_set_low().unwrap() {
454454
self.set_high()
455455
} else {
456456
self.set_low()

src/gpio/erased.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@ impl<MODE> ErasedPin<Output<MODE>> {
9999

100100
#[inline(always)]
101101
pub fn toggle(&mut self) {
102-
if self.is_set_low() {
102+
if self.is_set_low().unwrap() {
103103
self.set_high()
104104
} else {
105105
self.set_low()

src/gpio/partially_erased.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,7 @@ impl<MODE, const P: char> PartiallyErasedPin<Output<MODE>, P> {
8080

8181
#[inline(always)]
8282
pub fn toggle(&mut self) {
83-
if self.is_set_low() {
83+
if self.is_set_low().unwrap() {
8484
self.set_high()
8585
} else {
8686
self.set_low()

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