0.3.7

• Improve RISC-V support

  • Support 64-bit atomics on riscv32 when Zacas extension is available. (f32463f)
  • Support 128-bit atomics on riscv64 when Zacas extension is available. (f32463f)
  • Provide all operations when Zalrsc or Zacas extension is available even if A extension is not available. (2668665, 7069c98)
  • Optimize atomic CAS when Zacas extension is available. (0d7dc48, ed74261)

• Support PowerPC CPUs without lwsync instruction such as e500. (91812c2, 79f7479)

• Improve support for very legacy CPUs on x86 and MIPS. (02627e2, 2877324, 292f6b3)

• Optimize Arm/AArch64 atomic store/RMWs. (fdea51f)

• Optimize MSP430 atomic RMWs. (e76c112)

0.3.6

• Optimize Hexagon atomic RMWs. (cd12f7b)

• Improve compile-time detection of x86_32 x87. (7c40f86)

• Improve compile-time detection of m68k isa-68020. (0aec2a6)

• Improve diagnostics when method is unavailable. (b9f7f2d)

0.3.5

• Documentation improvements.

0.3.4

This release includes improvements to platform support, various optimizations, significant improvements to code comments, etc.

• Improvements to platform support:

  • Support SPARC/SPARC64 (experimental). (#31)
  • Support M68k (experimental). (#27, #28)
  • Support Xtensa (experimental). (#26, #29)
  • Support swap/CAS on MSP430 (experimental). (4fb09a7)

• Update to stabilized s390x and Arm64EC inline assembly. (c9d7286, 3a85789)

• Make from_ptr const fn on Rust 1.83+. (align to the std atomic change in Rust 1.84) (c8ef5c4)

• Various optimizations:

  • AArch64: Optimize 128-bit SeqCst load when FEAT_LRCPC3 enabled and 128-bit SeqCst store when FEAT_LRCPC3 enabled and FEAT_LSE128 is disabled. (#30)
  • pre-v6 Arm Linux/Android: Optimize {8,16,32}-bit swap/CAS and all 64-bit atomics. (#30)
  • PowerPC: Optimize {8,16}-bit swap/CAS (#30), all Acquire/AcqRel/SeqCst swap/CAS, all CAS with Relaxed failure ordering, and {8,16}-bit weak CAS (18aadd2).
  • s390x: Optimize {8,16,128}-bit swap. (#30)
  • RISC-V, MIPS, LoongArch64, Hexagon: Optimize {8,16}-bit swap/CAS. (#30)
  • AVR: Optimize 8-bit load/store. (18aadd2)

• Respect RUSTC_BOOTSTRAP=-1 recently added in nightly in rustc version detection. (07f64d5)

0.3.3

• Make get_mut const fn on Rust 1.83+. (484a32f)

• Work around LLVM pre-20 bug. (#25)

• Support atomic swap on RISC-V without A-extension when Zaamo extension enabled. (34d37b9)

• Optimize RISC-V {8,16}-bit atomic swap when Zabha is enabled. (34d37b9)

• Strengthen RISC-V SeqCst store to improve compatibility with code that uses atomic instruction mapping that differs from LLVM and GCC. (836d3fe)

• Optimize x86_32 64-bit load/store when SSE is not available. (c6f914b)

• Improve compile-time detection of AArch64 FEAT_LSE2/FEAT_LRCPC3/FEAT_LSE128. (959477b)

• Improve compile-time detection of powerpc64 partword-atomics/quadword-atomics. (e1a1596)

0.3.2

• Support Arm64EC (experimental). (4d94b3c)

• Support swap/CAS on AVR (experimental). (71b9a5f)

• Make into_inner const fn on Rust 1.61+. (align to the std atomic change in Rust 1.79) (9c253dc)

• Improve loongarch64 support. (358360c)

• Make rustc version detection robust for custom toolchains. (c034611)

• Respect RUSTC_WRAPPER in rustc version detection.

• Our build script is now less likely to be re-run unnecessarily in versions where the cargo bug fix is available (cargo 1.79+). (91ec716)

• Various optimizations

  • Optimize x86_32 64-bit load/store when SSE is not available. (75ca334)
  • Optimize PowerPC32 Acquire/SeqCst load. (f5ce83b)
  • Optimize x86 inline assembly. (adaf3a9, 3ba37e9, fcc0bf8)
  • Optimize s390x inline assembly. (9ee7f57)

0.3.1

• Add as_ptr and from_ptr.

• Optimize weak CAS on PowerPC.

• Optimize {8,16}-bit CAS on AArch64.

0.3.0

• Optimize inline assemblies using MaybeUninit input/output of inline assembly implemented by rust-lang/rust#114790, where it is available. This greatly improves performance and is almost equivalent to std atomic types. (#19)

0.2.22

• Add cfg_{has,no}_atomic_{8,16,32,64,128,ptr} macros to enable code when the corresponding atomic implementation is available/unavailable. (#9)

• Add cfg_{has,no}_atomic_cas macros to enable code when atomic swap/CAS implementation is available/unavailable. (#9)

• Documentation improvements. (#17, #18, thanks @RalfJung)

0.2.21

• Fix AVR 16-bit atomic load/store.

• Optimize AArch64 128-bit atomic store/swap when the lse128 target feature is enabled at compile-time.

• Optimize AArch64 128-bit atomic load/store when the rcpc3 target feature is enabled at compile-time.