riffpga -- write FPGA bitstreams through a USB drive, get USB serial and dynamic clocking in a platform independent way
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Feb 27, 2025 - C
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fpga-projects
Here are 8 public repositories matching this topic...
Simple Ping Pong game on Xilinx Spartan 3E
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Apr 29, 2022 - HTML
A pipelined Symmetric FIR (Finite Impulse Response) filter implementation in Verilog HDL.
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Dec 29, 2024 - Verilog
Undergraduate level RISC-V microcontroller
microcontroller cpu fpga amd riscv xilinx xilinx-fpga utfsm riscv32 nexys4ddr entry-level riscv-cpu fpga-projects
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Oct 12, 2022 - SystemVerilog
Verilog Code to Implementation on FPGA of 8 Bit Signed Multiplier
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Oct 17, 2024 - Verilog
Dive into the world of SystemVerilog with hands-on projects that bring RTL design and verification to life! From blinking counters to smart assertions, this repo is my personal sandbox for mastering the language behind modern chip design. Whether you're a VLSI enthusiast, an aspiring verification engineer, or just curious about how hardware think.
verilog systemverilog digital-design asic-verification hardware-verification fpga-projects rtl-design-and-verification
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Jun 15, 2025 - SystemVerilog
Verilog code to implement 8 bit full adder and demonstration of the result on FPGA board.
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Oct 17, 2024 - Verilog
T20 Cricket Game using Verilog coding. Includes a constraint file for implementing on Nexys A7 FPGA board.
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Dec 23, 2023 - Verilog
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