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Version 4.15
1 parent f4f68fe commit ccc7f8c

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lines changed

‎ZDMA/100T/src/pcileech_pcie_a7x4.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -346,7 +346,7 @@ module pcileech_tlps128_src128(
346346
assign tlps_out.tuser[1] = rxd_valid ? (rxd_eof || (rxf_eof && (rxf_eof_dw <= 1))) : rxf_eof; // tlast
347347
assign tlps_out.tuser[8:2] = rxd_valid ? rxd_bar_hit : rxf_bar_hit;
348348
assign tlps_out.tlast = tlps_out.tuser[1];
349-
assign tlps_out.tvalid = rxd_valid || (rxf_valid && !(rxf_sof && rxf_sof_qw));
349+
assign tlps_out.tvalid = rxd_valid || (rxf_valid && rxf_eof) || (rxf_valid && !(rxf_sof && rxf_sof_qw));
350350

351351
assign tlps_out.tkeepdw[0] = rxd_valid || rxf_valid;
352352
assign tlps_out.tkeepdw[1] = rxd_valid ? (!rxd_eof || rxd_eof_dw) :

‎ZDMA/100T/src/pcileech_tbx4_100t.xdc

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,8 @@
1+
# SW
2+
set_property PACKAGE_PIN F21 [get_ports power_sw]
3+
set_property IOSTANDARD LVCMOS18 [get_ports power_sw]
4+
set_property PULLTYPE PULLUP [get_ports power_sw]
5+
16
# LED
27
set_property PACKAGE_PIN AA5 [get_ports pcie_led]
38
set_property IOSTANDARD LVCMOS18 [get_ports pcie_led]

‎ZDMA/100T/src/pcileech_tbx4_100t_top.sv

Lines changed: 21 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -14,14 +14,17 @@ module pcileech_tbx4_100t_top #(
1414
// DEVICE IDs as follows:
1515
parameter PARAM_DEVICE_ID = 17,
1616
parameter PARAM_VERSION_NUMBER_MAJOR = 4,
17-
parameter PARAM_VERSION_NUMBER_MINOR = 14,
18-
parameter PARAM_CUSTOM_VALUE = 32'hffffffff
17+
parameter PARAM_VERSION_NUMBER_MINOR = 15,
18+
parameter PARAM_CUSTOM_VALUE = 32'hffffffff,
19+
parameter POWER_SW_MODE = 0, // disable_pcie_on_thunderbolt_noconnect_not_enabled(0), disable_pcie_on_thunderbolt_noconnect_enabled(1)
20+
parameter POWER_SW_TIME = 60*125_000_000 // detection sample time in ticks of 125MHz (125M=1s)
1921
) (
2022
// SYS
2123
input clk_in,
2224

2325
// SYSTEM LEDs and BUTTONs
2426
output pcie_led,
27+
input power_sw,
2528

2629
// TO/FROM FPGA IO BRIDGE
2730
input [36:0] BUS_DO,
@@ -45,6 +48,7 @@ module pcileech_tbx4_100t_top #(
4548
wire rst;
4649
wire clk;
4750
wire clk_com;
51+
reg rst_sw = 0;
4852

4953
// FIFO CTL <--> COM CTL
5054
wire [63:0] com_dout;
@@ -64,7 +68,7 @@ module pcileech_tbx4_100t_top #(
6468

6569
// PCIe
6670
wire pcie_present = pcie_present1 && pcie_present2;
67-
wire pcie_perst_n = pcie_perst1_n && pcie_perst2_n;
71+
wire pcie_perst_n = pcie_perst1_n && pcie_perst2_n && ~rst_sw;
6872

6973
// ----------------------------------------------------
7074
// CLK: INPUT (clkin): 50MHz
@@ -94,7 +98,20 @@ module pcileech_tbx4_100t_top #(
9498

9599
wire led_pcie;
96100
OBUF led_ld1_obuf(.O(pcie_led), .I(led_pcie));
97-
101+
102+
// ----------------------------------------------------
103+
// POWER SWITCH MODE (DISABLE PCIE WHEN THUNDERBOLT NOT CONNECTED)
104+
// ----------------------------------------------------
105+
106+
always @ ( posedge clk ) begin
107+
if ( rst ) begin
108+
rst_sw <= 0;
109+
end
110+
else if ( (POWER_SW_MODE == 1) && (tickcount64 == POWER_SW_TIME) ) begin
111+
rst_sw <= ~power_sw;
112+
end
113+
end
114+
98115
// ----------------------------------------------------
99116
// BUFFERED COMMUNICATION DEVICE (FPGA IO BRIDGE)
100117
// ----------------------------------------------------

‎ZDMA/readme.md

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -84,3 +84,9 @@ v4.14
8484
* Initial Release
8585
* Download pre-built binaries below:
8686
* [ZDMA](https://mega.nz/file/gCQ2kKhR#zSKpIP_sfRQ85zdtDwriAb8J9aAifdkCbfjHvPmaSnI) SHA256: `759c5ac97ffe742b38aa0c9ff4f62e49af01f32e9eb85697edf5692b00269475`
87+
88+
v4.15
89+
* Bug fixes for PCIe x4 interface.
90+
* Support for disabling device when Thunderbolt is not connected (not enabled in pre-built version).
91+
* Download pre-built binaries below:
92+
* [ZDMA](https://mega.nz/file/pD4XQKZJ#8RTqip8T2yXo1F8N0UgFikl4MEfaxtGotuZVabR_pGo) SHA256: `8084d838d2cd3715ffe52219a6faed599d40f228b0639eacdc337000cf89c419`

‎ac701_ft601/readme.md

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -111,13 +111,17 @@ v4.11
111111
v4.12
112112
* Bug fixes.
113113
* Download pre-built binary [here](https://mega.nz/file/haxAFYZR#6oEOklJH4hmyWYW7Ffhj88wdiUoaxVgyIpbEFhS95aY). <br>SHA256: `4581fda04fb681c7d0fe909c156c7c8dcb2c789bb3c0422ade0a973d8962365b`
114-
</details>
115114

116115
v4.13
117116
* Bug fixes.
118117
* New internal design with on-board PIO BAR support.
119118
* Download pre-built binary [here](https://mega.nz/file/1W4QgILB#t5pBSs2eznL8crm3GgSNRzbk1CSzb3_YSTI5Ok65-Ww) SHA256: `1607eed95b24b470be20b4ea710c0a4d0f446786a7acae939df4b827201cddea`
119+
</details>
120120

121121
v4.14
122122
* Bug fixes.
123123
* Download pre-built binary [here](https://mega.nz/file/AOhiSKDZ#OiQr9rgyWiOMMLE7S_qG3NDKLdRmpHs3tNENtKMw5v0) SHA256: `7d13e2626df82a352df16011ce94d0ca8f3958190fba08facda702f5e0a1916a`
124+
125+
v4.15
126+
* Bug fixes for PCIe x4 interface.
127+
* Download pre-built binary [here](https://mega.nz/file/UDYmEYZL#oiF3EvQymhMSwcu1D4JJH8v32vRvNg0_BYZ6GB6wVOw) SHA256: `7b99dc9fd91e8ecc6d97a72919745da2d58d977331cc7334dc0f899cbe93f896`

‎ac701_ft601/src/pcileech_ac701_ft601_top.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@
1313
module pcileech_ac701_ft601_top #(
1414
parameter PARAM_DEVICE_ID = 2,
1515
parameter PARAM_VERSION_NUMBER_MAJOR = 4,
16-
parameter PARAM_VERSION_NUMBER_MINOR = 14,
16+
parameter PARAM_VERSION_NUMBER_MINOR = 15,
1717
parameter PARAM_CUSTOM_VALUE = 32'hffffffff
1818
) (
1919
// SYS

‎ac701_ft601/src/pcileech_pcie_a7x4.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -346,7 +346,7 @@ module pcileech_tlps128_src128(
346346
assign tlps_out.tuser[1] = rxd_valid ? (rxd_eof || (rxf_eof && (rxf_eof_dw <= 1))) : rxf_eof; // tlast
347347
assign tlps_out.tuser[8:2] = rxd_valid ? rxd_bar_hit : rxf_bar_hit;
348348
assign tlps_out.tlast = tlps_out.tuser[1];
349-
assign tlps_out.tvalid = rxd_valid || (rxf_valid && !(rxf_sof && rxf_sof_qw));
349+
assign tlps_out.tvalid = rxd_valid || (rxf_valid && rxf_eof) || (rxf_valid && !(rxf_sof && rxf_sof_qw));
350350

351351
assign tlps_out.tkeepdw[0] = rxd_valid || rxf_valid;
352352
assign tlps_out.tkeepdw[1] = rxd_valid ? (!rxd_eof || rxd_eof_dw) :

‎readme.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -12,12 +12,12 @@ PCILeech currently supports multiple FPGA based devices with most recent firmwar
1212
| Device | Connection | Transfer Speed | Version | FPGA | PCIe Version | Project<br>Sponsor |
1313
| ------------------------------------- | ------------ | -------------- | --------| ------------ | ------------- | ------------------ |
1414
| [Screamer PCIe Squirrel](PCIeSquirrel)| USB-C | 190 MB/s | 4.14 | XC7A35T-484 | PCIe gen2 x1 | [💖](https://shop.lambdaconcept.com) |
15-
| [ZDMA](ZDMA) | Thunderbolt3 | 1000 MB/s | 4.14 | XC7A100T-484 | PCIe gen2 x4 | [💖](https://lightingz.store/) |
15+
| [ZDMA](ZDMA) | Thunderbolt3 | 1000 MB/s | 4.15 | XC7A100T-484 | PCIe gen2 x4 | [💖](https://lightingz.store/) |
1616
| [LeetDMA](https://enigma-x1.com/) | USB-C | 190 MB/s | 4.14 | XC7A35T-484 | PCIe gen2 x1 | [💖](https://enigma-x1.com/) |
1717
| [Enigma X1](EnigmaX1) | USB-C | 200 MB/s | 4.14 | XC7A75T-484 | PCIe gen2 x1 | [💖](https://enigma-x1.com/) |
1818
| [PCIeScreamerR04](ScreamerM2) | USB-C | 190 MB/s | 4.14 | XC7A35T-325 | PCIe gen2 x4* | [💖](https://shop.lambdaconcept.com) |
1919
| [ScreamerM2](ScreamerM2) | USB3/USB-C | 190 MB/s | 4.14 | XC7A35T-325 | PCIe gen2 x4* | [💖](https://shop.lambdaconcept.com) |
20-
| [AC701/FT601](ac701_ft601) | USB3 | 190 MB/s | 4.14 | XC7A200T-676 | PCIe gen2 x4 | |
20+
| [AC701/FT601](ac701_ft601) | USB3 | 190 MB/s | 4.15 | XC7A200T-676 | PCIe gen2 x4 | |
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2222
###### *) PCILeech FPGA uses PCIe x1 even if more PCIe lanes are available hardware-wise. This is sufficient to deliver neccessary performance.
2323

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