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Split-up register logic into RegisterStorage
1 parent 076e242 commit 5c0c2b1

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4 files changed

+59
-34
lines changed

4 files changed

+59
-34
lines changed

‎src/gdb.rs

+21-17
Original file line numberDiff line numberDiff line change
@@ -12,9 +12,10 @@ use crate::mi::{
1212
data_disassemble, data_disassemble_pc, data_read_memory_bytes, data_read_sp_bytes,
1313
join_registers, parse_asm_insns_values, parse_key_value_pairs, parse_memory_mappings_new,
1414
parse_memory_mappings_old, parse_mi_response, parse_register_names_values,
15-
parse_register_values, read_pc_value, Asm, MIResponse, Mapping, MemoryMapping, Register,
16-
INSTRUCTION_LEN, MEMORY_MAP_START_STR_NEW, MEMORY_MAP_START_STR_OLD,
15+
parse_register_values, read_pc_value, Asm, MIResponse, Mapping, MemoryMapping, INSTRUCTION_LEN,
16+
MEMORY_MAP_START_STR_NEW, MEMORY_MAP_START_STR_OLD,
1717
};
18+
use crate::register::RegisterStorage;
1819
use crate::Written;
1920

2021
pub fn gdb_interact(
@@ -26,7 +27,7 @@ pub fn gdb_interact(
2627
filepath_arc: Arc<Mutex<Option<PathBuf>>>,
2728
register_changed_arc: Arc<Mutex<Vec<u8>>>,
2829
register_names_arc: Arc<Mutex<Vec<String>>>,
29-
registers_arc: Arc<Mutex<Vec<(String, Option<Register>, Deref)>>>,
30+
registers_arc: Arc<Mutex<Vec<RegisterStorage>>>,
3031
current_pc_arc: Arc<Mutex<u64>>,
3132
stack_arc: Arc<Mutex<HashMap<u64, Deref>>>,
3233
asm_arc: Arc<Mutex<Vec<Asm>>>,
@@ -168,7 +169,7 @@ fn exec_result_done(
168169
fn exec_result_running(
169170
stack_arc: &Arc<Mutex<HashMap<u64, Deref>>>,
170171
asm_arc: &Arc<Mutex<Vec<Asm>>>,
171-
registers_arc: &Arc<Mutex<Vec<(String, Option<Register>, Deref)>>>,
172+
registers_arc: &Arc<Mutex<Vec<RegisterStorage>>>,
172173
hexdump_arc: &Arc<Mutex<Option<(u64, Vec<u8>)>>>,
173174
async_result_arc: &Arc<Mutex<String>>,
174175
) {
@@ -320,7 +321,7 @@ fn stream_output(
320321
fn recv_exec_result_asm_insns(
321322
asm: &String,
322323
asm_arc: &Arc<Mutex<Vec<Asm>>>,
323-
registers_arc: &Arc<Mutex<Vec<(String, Option<Register>, Deref)>>>,
324+
registers_arc: &Arc<Mutex<Vec<RegisterStorage>>>,
324325
stack_arc: &Arc<Mutex<HashMap<u64, Deref>>>,
325326
written: &mut VecDeque<Written>,
326327
) {
@@ -336,9 +337,9 @@ fn recv_exec_result_asm_insns(
336337
}
337338
if let Written::SymbolAtAddrRegister((base_reg, _n)) = &last_written {
338339
let mut regs = registers_arc.lock().unwrap();
339-
for (_, b, deref) in regs.iter_mut() {
340-
if let Some(b) = b {
341-
if b.number == *base_reg {
340+
for RegisterStorage { name: _, register, deref } in regs.iter_mut() {
341+
if let Some(reg) = register {
342+
if reg.number == *base_reg {
342343
let new_asms = parse_asm_insns_values(asm);
343344
if !new_asms.is_empty() {
344345
if let Some(func_name) = &new_asms[0].func_name {
@@ -373,7 +374,7 @@ fn recv_exec_result_memory(
373374
stack_arc: &Arc<Mutex<HashMap<u64, Deref>>>,
374375
thirty_two_bit: &Arc<AtomicBool>,
375376
endian_arc: &Arc<Mutex<Option<Endian>>>,
376-
registers_arc: &Arc<Mutex<Vec<(String, Option<Register>, Deref)>>>,
377+
registers_arc: &Arc<Mutex<Vec<RegisterStorage>>>,
377378
hexdump_arc: &Arc<Mutex<Option<(u64, Vec<u8>)>>>,
378379
memory: &String,
379380
written: &mut VecDeque<Written>,
@@ -393,9 +394,9 @@ fn recv_exec_result_memory(
393394
let mut regs = registers_arc.lock().unwrap();
394395

395396
let (data, _) = read_memory(memory);
396-
for (_, b, deref) in regs.iter_mut() {
397-
if let Some(b) = b {
398-
if b.number == base_reg {
397+
for RegisterStorage { name: _, register, deref } in regs.iter_mut() {
398+
if let Some(reg) = register {
399+
if reg.number == base_reg {
399400
let (val, len) = if thirty {
400401
let mut val = u32::from_str_radix(&data["contents"], 16).unwrap();
401402
let endian = endian_arc.lock().unwrap();
@@ -431,7 +432,7 @@ fn recv_exec_result_memory(
431432
next_write
432433
.push(data_disassemble(val as usize, INSTRUCTION_LEN));
433434
written.push_back(Written::SymbolAtAddrRegister((
434-
b.number.clone(),
435+
reg.number.clone(),
435436
val,
436437
)));
437438
break;
@@ -442,7 +443,8 @@ fn recv_exec_result_memory(
442443
// TODO: endian
443444
debug!("register deref: trying to read: {:02x}", val);
444445
next_write.push(data_read_memory_bytes(val, 0, len));
445-
written.push_back(Written::RegisterValue((b.number.clone(), val)));
446+
written
447+
.push_back(Written::RegisterValue((reg.number.clone(), val)));
446448
}
447449
}
448450
break;
@@ -574,7 +576,7 @@ fn read_memory(memory: &String) -> (HashMap<String, String>, String) {
574576
fn recv_exec_results_register_values(
575577
register_values: &String,
576578
thirty_two_bit: &Arc<AtomicBool>,
577-
registers_arc: &Arc<Mutex<Vec<(String, Option<Register>, Deref)>>>,
579+
registers_arc: &Arc<Mutex<Vec<RegisterStorage>>>,
578580
register_names_arc: &Arc<Mutex<Vec<String>>>,
579581
memory_map_arc: &Arc<Mutex<Option<Vec<MemoryMapping>>>>,
580582
filepath_arc: &Arc<Mutex<Option<PathBuf>>>,
@@ -669,8 +671,10 @@ fn recv_exec_results_register_values(
669671
}
670672
}
671673
let registers = join_registers(&regs_names, &registers);
672-
let registers: Vec<(String, Option<Register>, Deref)> =
673-
registers.iter().map(|(a, b)| (a.clone(), b.clone(), Deref::new())).collect();
674+
let registers: Vec<RegisterStorage> = registers
675+
.iter()
676+
.map(|(a, b)| RegisterStorage::new(a.clone(), b.clone(), Deref::new()))
677+
.collect();
674678
*regs = registers.clone();
675679

676680
// assuming we have a valid $pc, get the bytes

‎src/main.rs

+21-15
Original file line numberDiff line numberDiff line change
@@ -24,14 +24,16 @@ use ratatui::crossterm::{
2424
use ratatui::prelude::*;
2525
use ratatui::widgets::ScrollbarState;
2626
use regex::Regex;
27+
use register::RegisterStorage;
2728
use tui_input::backend::crossterm::EventHandler;
2829
use tui_input::Input;
2930

30-
use mi::{data_read_memory_bytes, Asm, MemoryMapping, Register};
31+
use mi::{data_read_memory_bytes, Asm, MemoryMapping};
3132

3233
mod deref;
3334
mod gdb;
3435
mod mi;
36+
mod register;
3537
mod ui;
3638

3739
enum InputMode {
@@ -160,7 +162,7 @@ struct App {
160162
/// Register TUI
161163
register_changed: Arc<Mutex<Vec<u8>>>,
162164
register_names: Arc<Mutex<Vec<String>>>,
163-
registers: Arc<Mutex<Vec<(String, Option<Register>, Deref)>>>,
165+
registers: Arc<Mutex<Vec<RegisterStorage>>>,
164166
/// Saved Stack
165167
stack: Arc<Mutex<HashMap<u64, Deref>>>,
166168
/// Saved ASM
@@ -201,7 +203,7 @@ impl App {
201203
(reader, gdb_stdin)
202204
}
203205
(false, Some(remote)) => {
204-
let tcp_stream = TcpStream::connect(remote).unwrap(); // Example address
206+
let tcp_stream = TcpStream::connect(remote).unwrap();
205207
let reader = BufReader::new(
206208
Box::new(tcp_stream.try_clone().unwrap()) as Box<dyn Read + Send>
207209
);
@@ -851,7 +853,7 @@ mod tests {
851853
use super::*;
852854
use insta::assert_snapshot;
853855
use libc::{chmod, S_IRGRP, S_IROTH, S_IRUSR, S_IWUSR, S_IXGRP, S_IXOTH, S_IXUSR};
854-
856+
855857
use ratatui::{backend::TestBackend, Terminal};
856858
use test_assets_ureq::{dl_test_files_backoff, TestAssetDef};
857859

@@ -932,7 +934,7 @@ mod tests {
932934
let stack = app.stack.lock().unwrap();
933935

934936
// rsi repeating
935-
assert!(registers[4].2.repeated_pattern);
937+
assert!(registers[4].deref.repeated_pattern);
936938

937939
// stack repeating
938940
let mut stack: Vec<_> = stack.clone().into_iter().collect();
@@ -1032,7 +1034,7 @@ mod tests {
10321034
let from = format!(
10331035
"0x{:02x}",
10341036
u64::from_str_radix(
1035-
&registers[2].1.as_ref().unwrap().value.as_ref().unwrap()[2..],
1037+
&registers[2].register.as_ref().unwrap().value.as_ref().unwrap()[2..],
10361038
16
10371039
)
10381040
.unwrap()
@@ -1042,7 +1044,7 @@ mod tests {
10421044
let from = format!(
10431045
"0x{:02x}",
10441046
u64::from_str_radix(
1045-
&registers[3].1.as_ref().unwrap().value.as_ref().unwrap()[2..],
1047+
&registers[3].register.as_ref().unwrap().value.as_ref().unwrap()[2..],
10461048
16
10471049
)
10481050
.unwrap()
@@ -1052,7 +1054,7 @@ mod tests {
10521054
let from = format!(
10531055
"0x{:02x}",
10541056
u64::from_str_radix(
1055-
&registers[4].1.as_ref().unwrap().value.as_ref().unwrap()[2..],
1057+
&registers[4].register.as_ref().unwrap().value.as_ref().unwrap()[2..],
10561058
16
10571059
)
10581060
.unwrap()
@@ -1062,26 +1064,30 @@ mod tests {
10621064
let from = format!(
10631065
"0x{:02x}",
10641066
u64::from_str_radix(
1065-
&registers[6].1.as_ref().unwrap().value.as_ref().unwrap()[2..],
1067+
&registers[6].register.as_ref().unwrap().value.as_ref().unwrap()[2..],
10661068
16
10671069
)
10681070
.unwrap()
10691071
);
10701072
let output = output.replace(&from, "<rbp_0>");
10711073

1072-
let from = format!("0x{:02x}", registers[3].2.map[0]);
1074+
let from = format!("0x{:02x}", registers[3].deref.map[0]);
10731075
let output = output.replace(&from, "<rdx_1>");
1074-
let from = std::str::from_utf8(&registers[3].2.map[1].to_le_bytes()).unwrap().to_string();
1076+
let from = std::str::from_utf8(&registers[3].deref.map[1].to_le_bytes())
1077+
.unwrap()
1078+
.to_string();
10751079
let output = output.replace(&from, "<rdx_2>");
10761080

1077-
let from = format!("0x{:02x}", registers[4].2.map[0]);
1081+
let from = format!("0x{:02x}", registers[4].deref.map[0]);
10781082
let output = output.replace(&from, "<rsi_1>");
1079-
let from = std::str::from_utf8(&registers[4].2.map[1].to_le_bytes()).unwrap().to_string();
1083+
let from = std::str::from_utf8(&registers[4].deref.map[1].to_le_bytes())
1084+
.unwrap()
1085+
.to_string();
10801086
let output = output.replace(&from, "<rsi_2>");
10811087

1082-
let from = format!("0x{:02x}", registers[6].2.map[0]);
1088+
let from = format!("0x{:02x}", registers[6].deref.map[0]);
10831089
let output = output.replace(&from, "<rbp_1>");
1084-
let from = format!("0x{:02x}", registers[6].2.map[1]);
1090+
let from = format!("0x{:02x}", registers[6].deref.map[1]);
10851091
let output = output.replace(&from, "<rbp_2>");
10861092

10871093
assert_snapshot!(output);

‎src/register.rs

+14
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
use crate::{deref::Deref, mi::Register};
2+
3+
#[derive(Debug, Clone)]
4+
pub struct RegisterStorage {
5+
pub name: String,
6+
pub register: Option<Register>,
7+
pub deref: Deref,
8+
}
9+
10+
impl RegisterStorage {
11+
pub fn new(name: String, register: Option<Register>, deref: Deref) -> Self {
12+
Self { name, register, deref }
13+
}
14+
}

‎src/ui/registers.rs

+3-2
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@ use ratatui::prelude::Stylize;
88
use ratatui::widgets::{Block, Borders, Cell, Table};
99
use ratatui::{layout::Rect, style::Style, widgets::Row, Frame};
1010

11+
use crate::register::RegisterStorage;
1112
use crate::App;
1213

1314
/// Registers
@@ -29,7 +30,7 @@ pub fn draw_registers(app: &App, f: &mut Frame, register: Rect) {
2930
let empty = PathBuf::from("");
3031
let binding = filepath_lock.as_ref().unwrap_or(&empty);
3132
let filepath = binding.to_string_lossy();
32-
for (i, (name, register, derefs)) in regs.iter().enumerate() {
33+
for (i, RegisterStorage { name, register, deref }) in regs.iter().enumerate() {
3334
if let Some(reg) = register {
3435
if !reg.is_set() {
3536
continue;
@@ -46,7 +47,7 @@ pub fn draw_registers(app: &App, f: &mut Frame, register: Rect) {
4647

4748
let mut extra_derefs = Vec::new();
4849
add_deref_to_cell(
49-
derefs,
50+
deref,
5051
&mut extra_derefs,
5152
app,
5253
&filepath,

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